The semiconductor industry currently spends in excess of one billion U.S. dollars each year manufacturing silicon wafers that must exhibit very flat and smooth surfaces. Known techniques to manufacture smooth and even-surfaced silicon wafers are plentiful. The most common of these involves the process known as Chemical Mechanical Polishing (CMP) which includes the use of a polishing pad in combination with an abrasive slurry. Of central importance in all CMP processes is the attainment of high performance levels in aspects such as uniformity of polished wafer, smoothness of the IC circuitry, removal rate for productivity, longevity of consumables for CMP economics, etc.